Over 20 years of hands-on experience in designing, managing, and successfully delivering real time and mission critical electronics hardware and software systems; I can help you succeed design, systems development and deployment and management of engineering products or solutions in telecommunication industries.

Digital Signal Processing

• Variable Rate Cubic and 5th order Interpolator,
• Upsampling,
• Quad Modulator,
• IF Modulator,
• Phase Accumulator,
• IQ Calibration,
• 3rd order Volterra Equalizer,
• Differentiator
• Integrator
• FIR and IIR Filter Design,
• Matlab analysis,

Telecommunication

• Satellite Communication
  • DVB-S2
  • Generic Stream Encapsulation, Mode and Stream adaptation,
  • FEC BCH and LDPC, Bit Mapper, QPSK 32APSK Modulator,
  • Phsical Layer Framer
  • SpaceWire (IEEE1355)
• Wireless Communication
  • GSM,
    • CDR Charging Software (C/UNIX).
    • CDR Charging Operation, Billing, Rating Operation (BSCS)
    • Phase2+ SIM Feature Management (GSM11.14)
    • ME-SIM Interface, GSM 11.11
    • Roaming Data processing, EDI operation
    • HLR, VLR, MSC or 800 applications
    • BSC-BTS Line Planning software
    • GSM 7.05 with MS TSPI, MSVC++
    • GSM 3.40 and deployed GSM Short Message server
    • GSM ME Client Application software
    • GSM SMS Server
  • SS7,
    • Call Control, ISUP
    • TCAP and MAP layers
    • OAM software for managing MTP, SCCP
  • TMN
  • Redundancy, Fault Logs, Network Alarm modules
  • Distibuted systems

Data Communication

• POS
• OC192
• SONET
• UART
• X25, PAD (X3, X28, X29), T1/E1 (G.703, G.704),
• ATM, Frame Relay,
• TCP/IP (v4, v6)
• ASN.1(X.208), LAT
• Traffic Management
  • Virtual Output Queuing,
  • Active Queue Management (AQM),
  • Priority Queuing in cell and frame level
  • Frame store and forward, frame assembly and disassembly, Cell conversion, Unicast, Multicast
  • Congestion Management,
  • Dynamic Random Early Detection (RED),
  • Back pressure and handshaking
  • Traffic Policing and Shaping,
  • Connection Auditing, FRR, WRR and WFQ hierarchical scheduling
• Network Processors, Switch Fabrics and Classifiers
• Security Encryption
  • MD5
  • DES
  • AES
• RPR (IEEE802.17),
• MAC,
• Fibre Channel,
• SPI,
• HDLC,
• 10GE,
• PLX 9056,
• ATM Statistics,
• RS, PCS, E3,
• TCP/IP,
• DDR2,
• USB

Database Administration Management

• Oracle, SQLServer, MySQL, Sybase, Gupta, MS Access, Clipper
• RDBMS DBA (Oracle, Gupta).
• Oracle SQL, SQLPlus, PL/SQL

Project Management

• Planning and implementing the necessary hardware, software and telecommunications equipment to maintain and/or enhance the wireless networks.
• Evaluating vendor products and recommended purchases consistent with the organization’s short and long-term objectives.
• Recommending and implementing network policies and procedures and ensured adherence to security procedures.
• Gathering and analysis of project related metrics.
• Organization, coordination and the communication between teams
• Feature management, SR management and product integration.

　Test hardware???

Hardware

• Board design schematics generation
• RF / Microwave
• ORCAD (Capture, Layout), PCB, SPICE, Circuit Design

Firmware

Complete FPGA design from initial conceptual design phase into full production

• Power and size analysis
• Part, IO electrical standards (SSTL, LVDS,...) and speed-grade selection,
• pinout optimisation, verification and selection,
• internal block architecture, efficient flexible and manageble inter module interface selection
• RTL coding using Verilog,
• device and vendor specific manual RTL optimization for speed
• DRAM controllers
• FCRAM controllers
• SDRAM,Flash controllers
• PCI drivers and controllers
• SPI controllers
• UTOPIA DASL Interface
• SERDES interface
• self monitoring test bench, harness design, bit accurate simulation and verification,gate level and behiv and board level simulation
• fitting, placing and routing, manual placement and routing
• static timing analysis,
• on-chip verification using SignalTap and ChipScope,
• signal integrity, optimizing drive strengts, IO speeds
• Altera Stratix
• Xilinx Virtex, Spartan
• Verilog XL, Vcs, Synplify, Synopsys, Chrysalis, PrimeTime, Xilinx ISE, ChipScope, Altera Quartus II, Debussy,

Software

• Controller microcde,
• Assambly,
• Embedded software,
• Boot straps and board support packages
• Kernel modules and device drivers
• User level application processes
• GUI
• Network Management, Managed Objects
• Compiler optimisation
• Load building
•  
• Object oriented,event drien,message based,real time
• C/C++,
• MS Visual C/C++ MFC and SDK, C#, .Net Framework,
• Rational, Objectime (ROOM Tool, UML)
• Assembly Language (Masm, Tasm, Intel x86),
• Perl/Tk
• SQL, PL/SQL, Pro*C(Oracle), SqlNet, SQLServer, SqlWindows (Gupta), MS ODBC,
• TAPI, TSPI
• UNIX Streams, UNIX DDI/DKI
• Java, PHP, SGML, XML, XHTML, JavaScript, VBScript, Dreamweaver
• SunLink SNA 3270 Gateway 9.0, SunLink X.25 8.0.2
• UNIX System Administration (Linux, DEC OSF/1, HP-UX, Sun Solaris)
• PPC/RTOS (MRI VRTX) Embedded Card
• multithread UNIX STREAMS kernel
• X11 GUI and text user interface
• MSVC++, ODBC
• Network Processor microcode and User Interface