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Vendor-independent design methodology What to do to design FPGA architecture that can be migrated different vendor environments easily? Keep IO instances at the top level and contain them in a seperate module. Keep a list the low level primitives such as RAMs and DSPs Wrap the IP cores with a container module. Make sure all the externally connected pins are defined in the top level port list. This is required to prevent the differnet devault values for unconnected pins in diffrent vendors.
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