FPGA Expertise
Over 20 years of hands-on experience in designing, managing, and successfully delivering real time and mission critical electronics hardware and software systems; We can help you succeed design, systems development and deployment and management of engineering products or solutions in telecommunication industries.
We are Hardware Engineers that is at the forefront of FPGA industry with specialized knowledge in ASIC/FPGA technologies. We are distinguished by the type of the projects we have helped completed such as
projects that hit a brick wall of timing or recourses,
projects that started on a wrong foot (incorrect pinout selection, lousy resource estimation, timing failures caused by inexperienced RTL design, FPGA unfriendly architecture ...)
Contact us for expert help on your FPGA project
We can
- run technical audits on existing FPGA project
- resolve timing issues,
- review and fix rtl,
- clear bottlenecks timing, resources, logic and flexibility,
- improve performance,
- completing failed FPGA projects
- and delivering full cycle FPGA projects.
We are capable of bringing the clock frequencies very close to advertised vendor data sheet maximum clock frequencies.
- We Work with customers to finalize requirements
design and write requirements specifications documents.
- Write documents for requirements flow-down to subcontractors; coordinated with these subcontractors to design and integrate hardware.
- Performed requirements analysis. Prepared a Design Specification Document. Interfaced with subcontractors and vendors for technical evaluation of proposals.
- Coordinate , bridge the gap between hardware and software departments.
- Evaluate problems to identify the areas of discrepancies.
- Work with engineers from both hardware and software departments to integrate the most cost effective solutions. Work with subcontractors to implement the design.
- Quality Management
- Train juniors of efficient coding styles.
- Generate Coding practices doc.
- Train for FPGA structure and tool utilisation.
- Floor planning.
- Content management
- Vendor selection Altera Xilinx
- Tools selection synplicity synopsys, modelsym.., clearcase..
installing the tools and upgrading during the project
- Development environment selection. Windows unix..
- Device size,
- Availaibility,
- Configuration (Prom, SW)
- Reconfiguration (flash and pr)
- Pin selection
- Electrical standards selection
- Terminations
- clock distribution
- reset metods and distribution. Reset tree.
- Resoruce Estimation
- Power requirements and restrictions (board restrictions, standard (PCIE,..) restrictions, device, bank restrictions)
- Temperature analysis
- Input output interfaces
- Internal architecture
- Resource Assignment and scheduling
- SW interface, registers, adress ranges
- LLD doc
- directory and file creation rtl,src,doc,sim,syn, ip
- rtl coding unit simulation
- test bench creation, generators and monitors and vpi libs,
- board model
- test case creation
- IT Document
- integration and verification using SW hal utility or full SW
- generatiing or acquiring ip cores
- behavioural models development and acquiring from vendors
- synthesis and timing and floor planning, constraints
- img generation bin/bit/img/mcs
- jtag configuration
- flash configuration
- SW configuration
- Partial reconfiguartion
- lab testing
- characterisation (temp, voltage)
- signal integrity checks
- calibration
- certification
- release management labeling
- creating bit accurate and cycle accurate simulation in SW
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