Verilog Console / VHDL Console
The Verilog Console module provides an interface between a serial (UART/RS232/USB) port of an FPGA /ASIC and the internal logic typically the register file.
The Verilog Console module helps in the following cases:
- Initial development
Usually during the first lab tests of the FPGA/ASIC, the full SW is not ready. Most of the time SW provides a simple console to be able to access the registers. If in case there is no SW support or SW requires substantial work to be operational, the verilog console comes to the rescue. Just connect 3 wires and you have a PC console that communicates inside the FPGA.
- Problem investigation
When there is a problem, it is highly the case that SW is not operational or FPGA.ASIC is not accessable through the SW. As long as the FPGA/ASIC is operatinal, the verilog console allows to access the unit. This will in many case help debug and fix the problem where it would be impossible otherwise.
- Status and Health monitoring
The verilog console can be used to constantly monitor the status without disturbing the normal operation of the FPGA/ASIC.
The module is easy to include and requires minimal or no additional HW or RTL to be operational. This is where it becomes handy.
The VHDL Console is also avaliable.
Download The Console Module Datasheet for more information.
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